Neuromorphic Computing

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• Processing Units - CPU, GPU, APU, TPU, VPU, FPGA, QPU
• Neuroscience
• Connecting Brains
• Architectures
• 'Brain-Like' Supercomputers Could Enable Better Defense Decision-Making: TrueNorth; "neuromorphic" chip | IBM - U.S. Department of Defense

Neuromorphic computing is a radical new approach to information processing for artificial intelligence where, instead of using digital electronics, inspiration is taken from the brain to develop entirely new electronic circuits and architectures. In order to mimic brain activity in the most energy efficient way, it is advantageous to introduce new electronic devices that model directly neurological elements like synapses and neurons. NIST

Neuromorphic frameworks incorporate radically different chip designs and algorithms to mimic the way the human brain works—while consuming only a fraction of the energy of today's microprocessors. The computing model takes direct aim at the inefficiencies of existing computing frameworks—namely the von Neumann bottleneck—which forces a processor to remain idle while it waits for data to move to and from memory and other components. This causes slow-downs and limits more advanced uses. Neuromorphic Chips Take Shape | Samuel Greengard - Communications of the ACM

Temporal Computing

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• Boosted Race Trees for Low Energy Classification | G. Tzimpragos, A. Madhavan, D. Vasudevan, D. Strukov, and T. Sherwood

The human brain does some types of information processing, like speech recognition, image recognition, or video processing, much more efficiently than can be done with modern computers. Neuromorphic computing is the field of making computing more efficient by taking inspiration from how the brain works. There is strong evidence that parts of the brain process information based on the timing of events, like neural spikes. Standard integrated circuits can be adapted to perform time-based computing to efficiently solve big-data processing and machine learning tasks efficiently. We are extending time-based computing in important ways by studying new device and memory technologies, exploring new mathematical frameworks and building demonstrations of time based computing architectures. NIST

In standard integrated circuits, information that is coded as ones and zeros is implemented by voltages on wires being high or low. The circuits consume energy during transitions between these voltages. Binary numbers have a voltage per bit so there are a lot of transitions each time a number changes. In “race logic” information is not encoded in these bits but rather in the time at which a voltage changes from high to low. This approach is lower precision than the usual binary representation of the information but can operate faster, at much lower energy, and with smaller area on the integrated circuit.

In race logic, information is encoded in wave fronts. A wave front is the set of transitions in a series of wires. The arrival times of the transitions can be compared using simple logic gates like OR-gates or AND-gates to determine which transition arrives first or last. As the wave front propagates through the circuit, different parts of the wave front move faster or slower depending on the information being processed. The final answer is determined by which signal wins the race, i.e. arrives first.

The simplicity of the unit cells makes race logic especially powerful on problems that can be mapped to spatially-organized data structures such as graphs or trees. A wave front can explore all possible paths at once very quickly and with very little energy. However, one drawback of CMOS-only implementations is that the ubiquitously used delay elements are volatile and energy hungry. Delay elements are crucial parts of the circuit that make different segments have different temporal magnitudes. This affects the temporal ordering and hence the outcome of races. We are working to develop tunable low-energy delay elements based on memristors, which are tunable non-volatile devices whose resistance can be changed by passing currents through them.

Making race logic useful for solving an even broader class of problems requires a way to store wave fronts, that is, a temporal memory. Creating such a memory requires transposing the time encoded information into a static, non-volatile encoding. We are pursuing two options. One approach involves the same memristors that we are exploring for programmable delay elements. This approach involves using time differences in voltages to create corresponding changes in the resistance of the memristors. In another approach, we are using the time differences in the voltages to move a magnetic structure in a magnetic wire. Each nanodevice has its own properties such as linearity, noise, area, efficiency and speed that need to be understood before they can be incorporated into temporal memory architectures.

Race logic not only works well with conventional integrated circuits, but also in novel low temperature computing environments based on superconductors. In such computing approaches, the physical encoding is naturally spike-based and hence lends itself well to temporal coding approaches. While low temperature computers are unlikely to be important in consumer electronics, they could play an important role in data centers because they can be much faster and lower energy than existing electronics. We are exploring superconducting circuits that would be needed for such applications.